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Pin Configuration
HIN1 1
LIN1 2
HIN2 3
LIN2 4
HIN3 5
LIN3 6
LO3 7
20 V B1
19 HO1
18 V S1
17 LO1
16 V B2
15 HO2
14 V S2
V S3
8
13 LO2
HO3 9
V B3 10
12 V DD
11 GND
FAN7388 Rev.00
Figure 3. Pin Configuration (Top View)
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
HIN1
LIN1
HIN2
LIN2
HIN3
LIN3
LO3
V S3
HO3
V B3
GND
V DD
LO2
V S2
HO2
V B2
LO1
V S1
HO1
V B1
Description
Logic input 1 for high-side gate 1 driver
Logic input 1 for low-side gate 1 driver
Logic input 2 for high-side gate 2 driver
Logic input 2 for low-side gate 2 driver
Logic input 3 for high-side gate 3 driver
Logic input 3 for low-side gate 3 driver
Low-side gate driver 3 output
High-side driver 3 floating supply offset voltage
High-side driver 3 gate driver output
High-side driver 3 floating supply voltage
Ground
Logic and all low-side gate drivers power supply voltage
Low-side gate driver 2 output
High-side driver 2 floating supply offset voltage
High-side driver 2 gate driver output
High-side driver 2 floating supply voltage
Low-side gate driver 1 output
High-side driver 1 floating supply offset voltage
High-side driver 1 gate driver output
High-side driver 1 floating supply voltage
? 2008 Fairchild Semiconductor Corporation
FAN7388 ? Rev.1.0.1
3
www.fairchildsemi.com
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